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Logic circuits

Using Sub-Network Combinations to Scale Up an Enumeration Method for Determining the Network Structures of Biological Functions

J. Y. Xi, Q. Ouyang

Computing mathematical functions with chemical reactions via stochastic logic

Arnav Solanki, Tonglin Chen, Marc Riedel

Speed and energy optimized quasi-delay-insensitive block carry lookahead adder

P. Balasubramanian, D. L. Maskell, N. E. Mastorakis

A debug scheme to improve the error identification in post-silicon validation

Inhyuk Choi, Won Jung, Hyunggoy Oh, Sungho Kang

Neural flip-flops I: Short-term memory

Lane Yoder

Uniform patterns based area-efficient and accurate stochastic computing finite impulse response filter

Muhammad Ijaz, Syed Azhar Ali Zaidi, Aamir Rashid

High-speed and energy-efficient asynchronous carry look-ahead adder

Padmanabhan Balasubramanian, Weichen Liu

Speed, energy and area optimized early output quasi-delay-insensitive array multipliers

P. Balasubramanian, D. L. Maskell, N. E. Mastorakis

Asynchronous quasi delay insensitive majority voters corresponding to quintuple modular redundancy for mission/safety-critical applications

P. Balasubramanian, N. E. Mastorakis

Logical gates in ensembles of proteinoid microspheres

Panagiotis Mougkogiannis, Andrew Adamatzky

Efficient design and implementation of approximate FA, FS, and FA/S circuits for nanocomputing in QCA

Saeid Seyedi, Hatam Abdoli

Ambiguity in logic-based models of gene regulatory networks: An integrative multi-perturbation analysis

Amir Reza Alizad-Rahvar, Mehdi Sadeghi

Features of digital signal processing algorithms using Galois fields GF(2ⁿ+1)

Ibragim E. Suleimenov, Yelizaveta S. Vitulyova, Dinara K. Matrassulova

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