Fig 1.
Block diagram of the multi-port DC-DC converter.
Fig 2.
Interleaved boost converter circuit with three-level VMC and SCSL module.
Fig 3.
The two-phase interleaved boost stage.
Fig 4.
Two-phase interleaved boost stage: Switching pattern.
Fig 5.
Voltage multiplier circuit (a) Dickson VMC, (b) Cockcroft- Walton VMC.
Fig 6.
Cuk-derived switched capacitor and switched inductor.
Fig 7.
Interleaved operation of the proposed converter, (a) Interleaved operation using both sources, (b) Interleaved operation using a renewable energy source, and (c) Interleaved operation using the energy storage system.
Fig 8.
Power transfer from RES to ESS.
Fig 9.
High-voltage side to low-voltage DC side power transfer.
Fig 10.
(a) Control structure; (b) Block diagram of power transfer mode control algorithm; (c) Flow chart for mode selection.
Table 1.
Power transfer modes.
Fig 11.
Simulation waveforms for (a) Voltage and current waveforms at RES in Mode 2, (b) Voltage and current waveforms at ESS in Mode 2, (c) Voltage and current waveforms at the DC grid in Mode 2, (d) Voltage and current waveforms at RES in Mode 1, (e) Voltage and current waveforms of ESS in Mode 1, (f) Voltage and current waveforms at the DC grid in Mode 3, (g) Voltage and current waveforms at ESS in Mode 3, (h) DC grid voltage for varying voltage at RES.
Table 2.
Simulation parameters.
Fig 12.
Hardware prototype and experimental setup of an interleaved boost converter with three-level VMC and SCSL module.
Fig 13.
(a) Experimental results of switching pulses S1 and S2, (b) Experimental results of switching pulses S3 and S4, (c) Experimental results of switching pulse S5.
Fig 14.
Experimental waveforms for (a) Voltage and current waveforms at RES in Mode 2, (b) Voltage and current waveforms at ESS in Mode 2, (c) Voltage and current waveforms at the DC grid in Mode 2, (d) Voltage and current waveforms at RES in mode 1, (e) Voltage and current waveforms of ESS in mode 1, (f) Voltage and current waveforms at the DC grid in mode 3, (g) Voltage and current waveforms at ESS in mode 3, (h) C. grid voltage for varying voltage at RES.
Table 3.
Hardware component values.
Table 4.
Calculation of power and efficiency.
Fig 15.
Efficiency against various loading conditions for different modes of power transfer.
Table 5.
Comparison between the proposed converter and related bi-directional and unidirectional converters.