Fig 1.
2D schematics of the 22 nm (top) and 10 nm (bottom) gate length GAA NW FETs.
Fig 2.
Cross-section of Gaussian-like doping profile along the transport direction in the 22 nm and 10 nm gate length GAA NW FETs.
Table 1.
Dimensions, dopings and configuration parameters for the two ideal, LER-free GAA NW FETs.
Fig 3.
Experimental (EXP) vs. simulated ID-VG characteristics at VD=1.0 V, on both logarithmic and linear scales, for the 22 nm gate length GAA NW FET.
Quantum-corrected drift-diffusion (DD) and Monte Carlo (MC) simulations are included for comparison. The main figures of merit (FOM) that characterize device performance, off-current (Ioff), threshold voltage (Vth) and on-current (Ion) are included.
Table 2.
Main figures of merit that characterize the performance of the two ideal, LER-free GAA NW FETs.
Fig 4.
Example of a 22 nm gate length GAA NW FET affected by LER.
The correlation length (CL) is 10 nm and the root mean square (RMS) height is 1 nm.
Fig 5.
Line-edge roughness deformation (CL = 10 nm, RMS = 1 nm) illustrating the effect on the 22 nm gate length device geometry.
The outline of the ideal undeformed device is included as reference.
Fig 6.
Example of a multi-layer perceptron network (MLP) containing two hidden layers.
Table 3.
Main characteristics of the MLP network considered in this work.
Note that the solver refers to the algorithm or method used to solve the optimization problem involved in training the regressor. L2 regularization adds a penalty term to the loss function during training to prevent overfitting.
Fig 7.
Predicted and actual values for the considered figures of merit using our test dataset (LER-affected 22 nm gate length GAA NW FETs).
Fig 8.
Predicted and actual values for the considered figures of merit using our test dataset (LER-affected 10 nm gate length GAA NW FETs).
Table 4.
Performance metrics (R2 and RMSE) of our MLP-based regression models.
Fig 9.
Impact of the training data size on the performance of the MLP models (LER-affected 22 nm gate length GAA NW FETs).
(a) Ioff. (b) Ion. (c) SS. (d) Vth.
Table 5.
Performance metrics obtained by different machine learning techniques for regression.
Fig 10.
Performance metrics using a transfer learning approach and training the networks from scratch (i.e., without transfer learning) to predict the figures of merit of the 10 nm gate length devices.
(a) Ioff. (b) Ion. (c) SS. (d) Vth.
Table 6.
Performance metrics obtained by our transfer learning approach when using a small fraction of the training dataset to predict the figures of merit of the 10 nm gate length devices.
Table 7.
Carbon emissions in grams of CO2 to compute the figures of merit of only one LER-affected 10 nm gate length GAA NW FET using simulations and our MLP-based approach with and without transfer learning.