Fig 1.
Process flow diagram for parameter extraction.
Fig 2.
Electrons and holes mobility as a function of doping concentration.
Fig 3.
Sic nmos surface potential as a function of substrate doping.
Fig 4.
(A) Oxide capacitance as a function of electron motilities. (B) Thickness oxide as a function of Oxide capacitance.
Fig 5.
Variation in body bias coefficient by varying oxide capacitance.
Fig 6.
SiC NMOS Buck converter scheme includes (A) switch turns on (B) switch turns off and diode D conducts.
Table 1.
Sic level 3 nmos model extracted parameter.
Fig 7.
Schematic diagram of input transfer characteristics of sic nmos.
Fig 8.
Comparison of proposed SiC MOSFET model input transfer characteristics (A) impact of temperature (B) comparison to datasheet at T = 25°C.
Fig 9.
Sic nmos output transfer characteristics of the proposed model (A) at 25°C (B) at 150°C.
Fig 10.
SiC nmos circuit for its transient analysis.
Fig 11.
Transient analysis of proposed sic nmos for pulse (μ = micro).
Table 2.
Effect of changing external resistance over device transients.
Fig 12.
SiC nmos circuit for its transient analysis.
Fig 13.
(A) PWM waveform of driving circuit on the oscilloscope, (B) output waveform of a dc-dc buck converter using the oscilloscope, and (C) output voltage of dc-dc buck converter through simulation.
Fig 14.
Experimental setup of sic-based buck convertor.
Table 3.
List of components used for lab testing.
Table 4.
Comparison of simulation model results with that of practical lab results.