Fig 1.
Buck PFC circuit operating in DCVM mode.
Fig 2.
Working waveforms of Buck PFC circuit in DCVM mode.
Fig 3.
Ms-D curve at efficiency η =0.85.
Fig 4.
Ms-Ks curve under different parameter K and η.
Table 1.
Design parameters of Buck PFC circuit.
Table 2.
Analysis of circuit operating characteristics under different K values at η =0.85.
Fig 5.
Full-Bridge DC/DC converter with primary clamping diode.
Table 3.
Design parameters of Full-Bridge DC/DC converter.
Fig 6.
Control strategy of two-stage AC/DC converter.
Fig 7.
Buck circuit equivalent model of full-bridge converter.
Fig 8.
Input voltage and current waveforms in normal operation mode.
Fig 9.
Input current waveform in normal operation mode.
Fig 10.
System output voltage waveform under load surge.
Fig 11.
Comparison of output voltage waveforms at system startup.
Fig 12.
Comparison of output voltage waveform under load disturbance.
Fig 13.
Prototype platform of two-stage AC/DC converter.
Fig 14.
Software and hardware control flow chart.
Fig 15.
Input voltage and current at 25% load.
Fig 16.
Input voltage and current at 50% load.
Fig 17.
Input voltage and current at 75% load.
Fig 18.
Input voltage and current at full load.
Fig 19.
Zero-voltage turn-on waveform of the leading-leg.
Fig 20.
Zero-voltage turn-on waveform of the lagging-leg.
Fig 21.
MOSFET driving waveform of the leading-leg.
Fig 22.
MOSFET driving waveforms of the leading-leg and lagging-leg.
Fig 23.
Startup waveform under PI control strategy.
Fig 24.
Startup waveform under ATSMC control strategy.
Fig 25.
Output voltage waveform under PI control strategy.
Fig 26.
Output voltage waveform under ATSMC control strategy.
Fig 27.
Load switching waveform under PI control strategy.
Fig 28.
Load switching waveform under ATSMC control strategy.
Fig 29.
Efficiency curve of front-stage Buck PFC converter.
Fig 30.
Efficiency curve of rear-stage full-bridge converter.