Fig 1.
Block diagram for a NLDBM logic block.
Fig 2.
The architecture of the new NLDBM hardware.
Fig 3.
4 NLDBM logic blocks and 8 multiplexers are labeled.
Table 1.
The instruction set of a single fabricated NLDBM logic block.
Table 2.
An example function implemented by the two-input, one-output NLDBM logic block.
Fig 4.
Flowchart for the genetic algorithm used in this article.
Table 3.
Truth table for a two-bit addition operation.
Fig 5.
The unrolled architecture effectively equivalent to the case when the outputs of the fabricated circuit are fed back to the inputs five times.
Fig 6.
Observed output waveforms from NLDBM hardware.
The results of four addition outputs can be observed from the outputs.
Table 4.
Hamming weight function as an example objective function.
Q1Q0 presents the number of 1’s in the A2A1A0 stream.
Fig 7.
Observed output waveforms from NLDBM hardware.
The hardware calculates Hamming weights of five different inputs.