Low-power and area-efficient memristor based non-volatile D latch and flip-flop: Design and analysis

• Haroon Rasheed S. ,

  Contributed equally to this work with: Haroon Rasheed S., Rajeev Pankaj Nelapati

  Roles Conceptualization, Writing – original draft

  Affiliation School of Electronics Engineering, Vellore Institute of Technology, Vellore, Tamilnadu, India

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• Rajeev Pankaj Nelapati

  Contributed equally to this work with: Haroon Rasheed S., Rajeev Pankaj Nelapati

  Roles Supervision, Writing – review & editing

  * E-mail: rajeevpankaj@vit.ac.in

  Affiliation School of Electronics Engineering, Vellore Institute of Technology, Vellore, Tamilnadu, India

  https://orcid.org/0000-0001-6606-0119

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