A debug scheme to improve the error identification in post-silicon validation

• Inhyuk Choi,

  Roles Conceptualization, Formal analysis

  Current address: Dept. of Electrical and Electronic Engineering, Yonsei University, Seodaemoon-Gu, Seoul, Korea

  Affiliation Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea

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• Won Jung,

  Roles Investigation, Methodology

  Current address: Dept. of Electrical and Electronic Engineering, Yonsei University, Seodaemoon-Gu, Seoul, Korea

  Affiliation Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea

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• Hyunggoy Oh,

  Roles Data curation, Validation

  Current address: Dept. of Electrical and Electronic Engineering, Yonsei University, Seodaemoon-Gu, Seoul, Korea

  Affiliation Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea

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• Sungho Kang

  Roles Conceptualization, Formal analysis, Funding acquisition, Supervision

  * E-mail: shkang@yonsei.ac.kr

  Current address: Dept. of Electrical and Electronic Engineering, Yonsei University, Seodaemoon-Gu, Seoul, Korea

  Affiliation Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea

  http://orcid.org/0000-0002-7093-2095

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