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Design of High Speed and Low Offset Dynamic Latch Comparator in 0.18 µm CMOS Process
- Labonnah Farzana Rahman,
- Mamun Bin Ibne Reaz,
- Chia Chieu Yin,
- Mohammad Alauddin Mohammad Ali,
- Mohammad Marufuzzaman
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- Published: October 9, 2014
- https://doi.org/10.1371/journal.pone.0108634